NCEP CCS Conversion Guide |
POWER4 Specs |
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POWER3 vs. POWER4
Per CPU Characteristics | Winter Hawk 2 (asp/bsp) | Regatta (Snow/Frost) |
Clock Speed (MHz) | 375 | 1300 |
L1 Data Cache (Kbytes) | 64 | 32 |
L2 Data Cache (Kbytes) | 8192 | 720 |
L3 Cache (Kbytes) | 0 | 16384 |
Floating Point Latency (Clocks) | 3 | 6 |
Memory Bandwidth (MBytes/sec) | 285 | 913 |
POWER4 Cache Structure
Component | Organization | Capacity |
L1 Instruction Cache | Direct Map, 128-byte line | 64 KBs per CPU |
L1 Data Cache | Two-way, 128-byte line | 32 KBs per CPU |
L2 Cache | Eight-way, 128-byte line | 1440 KBs shared by 2 CPUs |
L3 Cache | Eight-way, 512-byte line | 128 MBs shared by 8 CPUs |
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